1. Technical Field
This disclosure relates generally to image sensors, and in particular, but not exclusively to complementary metal-oxide semiconductor (“CMOS”) image sensors.
2. Background Art
Conversion gain of a pixel cell refers to a ratio of a voltage change at a floating diffusion (FD) node of the pixel cell to an amount of charge transferred to the FD node for the voltage change. High conversion gain is advantageous for CMOS image sensors operating under low lighting condition, because the gain is applied at an early stage of a signal sequence, thereby producing comparatively low read noise. However, a high conversion gain typically leads to lower signal to noise ratio (SNR) under comparatively high lighting conditions, when photon shot noise is a dominant noise source. Dual conversion gain (DCG) image sensors have the advantage of high full well capacity (hence higher signal noise ratio) under high light environment and lower read noise under low light environment.
Currently, DCG for a pixel cell is implemented by adding to the pixel cell a capacitor and a controlling transistor, which are coupled in series with one another between a ground voltage and the FD node of the pixel cell. The controlling transistor can be turned on or off based on an exposure control signal to connect or disconnect the capacitor to the FD node, realizing dual conversion gain. However, both the capacitor and controlling transistor take silicon space, resulting in reduced fill factor of a photodiode of the pixel cell. This can be a problem for small pixel size image sensors. As pixel cell sizes continue to shrink, image sensor technology is increasingly sensitive to space inefficient mechanisms for providing conversion gain.